G11C   5/00		ǣãʬव뵭֤κ	Details of stores covered by group <b>G11C11/00</b>	5306
G11C   5/02		ǻҤ֡㡥ޥȥåˤ	Disposition of storage elements, e.g. in the form of a matrix array	4418
G11C   5/04		ǻҤΤλٻΡΤ褦ʻٻΤؤεϿǻҤμդޤϸ	Supports for storage elements; Mounting or fixing of storage elements on such supports	1787
G11C   5/05		ޥȥå˻ٻΡΣ	Supporting of cores in matrix	140
G11C   5/06		ǻҤŵŪ߷礹뵡㡥磻	Arrangements for interconnecting storage elements electrically, e.g. by wiring	5628
G11C   5/08		ŪǻҤ߷礹뤿ΤΡ㡥ȥ뼧Ф	for interconnecting magnetic elements, e.g. toroidal cores	221
G11C   5/10		ǥ󥵤߷礹뤿Τ	for interconnecting capacitors	178
G11C   5/12		ǻҤ߷礹뤿Ѥ֤ޤˡ㡥̤Τ	Apparatus or processes for interconnecting storage elements, e.g. for threading magnetic cores	526
G11C   5/14		϶֡Σ	Power supply arrangements	12802
G11C   7/00		ǥ뵭֤˾񤭹ߤޤϥǥ뵭֤ɤ߽Фʣǣãͥ表ȾƳ֤ѤΤμյϩǣãǣãǣãˡΣ	Arrangements for writing information into, or reading information out from, a digital store(<b>G11C5/00</b> takes precedence; auxiliary circuits for stores using semiconductor devices <b>G11C11/4063</b>, <b>G11C11/413</b>, <b>G11C11/4193</b>)	20486
G11C   7/02		򤹤ʤĤ	with means for avoiding parasitic signals	2468
G11C   7/04		٤αƶ˴Ť㳲ʤĤ	with means for avoiding disturbances due to temperature effects	1776
G11C   7/06		ϢϩΣ	Sense amplifiers; Associated circuits	7130
G11C   7/08		Σ	Control thereof	1346
G11C   7/10		ϡϡʣɡϡ˥ǡ󥿡ե֡㡥ɡϥǡϩɡϥǡХåեΣ	Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers	22168
G11C   7/12		ӥåϩ㡥ӥåѤΡɥ饤С֡ץ륢åײϩץϩץ㡼󥰲ϩϩΣ	Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines	5318
G11C   7/14		ߡѥեŰȯϩΣ	Dummy cell management; Sense reference voltage generators	1055
G11C   7/16		ʥǥʣġѴǥꡤӥǥ롿ʥʣġѴ狼֤Ȥäǥ뵭֤ؤΥʥεΣ	Storage of analogue signals in digital stores using an arrangement comprising analogue/digital [A/D] converters, digital memories and digital/analogue [D/A] converters	5748
G11C   7/18		ӥåӥå֡Σ	Bit line organisation; Bit line lay-out	2579
G11C   7/20		ꥻϩ㡥ѥåפȤޤϥѥ󤷤ȤΡꡦꥢߥ᡼Σ	Memory cell initialisation circuits, e.g. when powering up or down, memory clear, latent image memory	1411
G11C   7/22		ɽФݽߡΣҡݣסϤΥߥ󥰡ޤϥåϩɽФݽߡΣҡݣס濮ȯޤϴΣ	Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management	8783
G11C   7/24		ꡦΰϩޤݸϩ㡥դɽФޤϽߤɤ֡ơ롨ƥȡΣ	Memory cell safety or protection circuits, e.g. arrangements for preventing inadvertent reading or writing; Status cells; Test cells	1703
G11C   8/00		ǥ뵭֤Υɥ쥹򤹤뵡ʣǣãǣãͥ表ȾƳ֤Ѥ֤ΤβϩǣãǣãǣãˡΣ	Arrangements for selecting an address in a digital store(auxiliary circuits for stores using semiconductor devices <b>G11C11/4063</b>, <b>G11C11/413</b>, <b>G11C11/4193</b>)	6785
G11C   8/02		ޥȥåѤΡΣ	using selecting matrix	431
G11C   8/04		缡ɥ쥷֤ѤΡ㡥եȥ쥸󥿡Σ	using a sequential addressing device, e.g. shift register, counter	1262
G11C   8/06		ɥ쥹󥿡ե֡㡥ɥ쥹ХåեΣ	Address interface arrangements, e.g. address buffers	1186
G11C   8/08		ϩ㡥ѤΥɥ饤С֡ץ륢åײϩץϩץ㡼ϩΣ	Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines	4157
G11C   8/10		ǥΣ	Decoders	2856
G11C   8/12		롼ϩ㡥֥å򡤥å򡤥쥤ѤΡΣ	Group selection circuits, e.g. for memory block selection, chip selection, array selection	2866
G11C   8/14		ɥ饤ɥ饤֡Σ	Word line organisation; Word line lay-out	2023
G11C   8/16		ޥꡦ쥤㡥ʤȤĤΩɥ쥹饤󡦥롼פˤäơĤεǻҤ򥢥ɥ쥹򤹤ΡΣ	Multiple access memory array, e.g. addressing one storage element via at least two independent addressing line groups	1431
G11C   8/18		ɥ쥹ߥ󥰡ޤϥåϩɥ쥹濮ȯޤϴ㡥ɥ쥹ȥֿޤϥॢɥ쥹ȥֿΤΤΡΣ	Address timing or clocking circuits; Address control signal generation or management, e.g. for row address strobe [RAS] or column address strobe [CAS] signals	2769
G11C   8/20		ɥ쥹ϩޤݸϩʤޤϸäɻߤ֡Σ	Address safety or protection circuits, i.e. arrangements for preventing unauthorized or accidental access	344
G11C  11/00		ŵŪޤϼŪǻҤλѤˤäħŤ줿ǥ뵭֡ΤεǻҡʣǣãǣãͥˡΣ<br><br><b><ul></ul></b><br>롼ףϥ롼ף飱ͥ褹롣Σ	Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor(<b>G11C14/00 to G11C21/00</b>  take precedence)	8816
G11C  11/02		ŪǻҤѤ	using magnetic elements	1500
G11C  11/04		εǻҡ㡥åɡ磻ѤΡʣǣãǣãͥˡΣ	using storage elements having cylindrical form, e.g. rod, wire(<b>G11C11/12</b>, <b>G11C11/14</b> take precedence)	313
G11C  11/06		ñ쵭ǻҤѤΡ㡥ȥ뼧¿ĤѤ줾ιĤεǻҤ	using single-aperture storage elements, e.g. ring core; using multi-aperture plates in which each individual aperture forms a storage element	1843
G11C  11/061		ǻҤǣӥåȤ򵭲˲ɽФԤʤñιޤϼ롼פͭǻҤѤΡΣ	using elements with single aperture or magnetic loop for storage, one element per bit, and for destructive read-out	23
G11C  11/063		̡ġĥ˥Τ褦˥ӥåȤȿ줿ΡʤߤɽФˤ꾯ʤȤ⣲Ĥΰפήˤ꣱ĤεǻҤ򤹤뤿ȿ줿ΡΣ	bit-organised, such as 2L/2D-organisation or three-dimensional [3D]-organisation, i.e. for selection of an element by means of at least two coincident partial currents both for reading and for writing	50
G11C  11/065		ĥ˥ޤϥ˥Τ褦˥ɤȿ줿ΡʤñȤνʬɽФήˤ꣱ʬǻҤ򤹤뤿ȿ줿ΡΣ	word-organised, such as two-dimensional [2D]-organisation, or linear selection, i.e. for selection of all the elements of a word by means of a single full current for reading	21
G11C  11/067		ǻҤǣӥåȤ򵭲˲ɽФԤʤñιޤϼ롼פͭǻҤѤΡΣ	using elements with single aperture or magnetic loop for storage, one element per bit, and for non-destructive read-out	17
G11C  11/08		¿ǻҤѤΡ㡥ȥ󥹥ե饯ѤΡʣĤΩ¿ǻҤȤ߹ľΤѤΡʣǣãͥˡΣ	using multi-aperture storage elements, e.g. using transfluxors; using plates incorporating several individual multi-aperture storage elements(<b>G11C11/10</b> takes precedence)	257
G11C  11/10		¿ǻҤѤ	using multi-axial storage elements	61
G11C  11/12		ƥ󥵡ѤΡȥѤΡʤμͤƤ	using tensors; using twistors, i.e. elements in which one axis of magnetisation is twisted	62
G11C  11/14		ǻҤѤ	using thin-film elements	8059
G11C  11/15		¿ؤμؤѤΡʣǣãͥˡΣ	using multiple magnetic layers(<b>G11C11/155</b> takes precedence)	4564
G11C  11/155		ηͭΡΣ	with cylindrical configuration	425
G11C  11/16		ѤŪԥ̤˴ŤƤǻҤѤ	using elements in which the storage effect is based on magnetic spin effect	7390
G11C  11/18		ۡǻҤѤ	using Hall-effect devices	381
G11C  11/19		ϩˤͶƳǻҤѤΡΣ	using non-linear reactive devices in resonant circuits	6
G11C  11/20		ѥȥѤΡΣ	using parametrons	82
G11C  11/21		ŵŪǻҤѤΡΣ	using electric elements	588
G11C  11/22		ͶǻҤѤΡΣ	using ferroelectric elements	5041
G11C  11/23		ĤζؾŵѤΡ㡥ե쥹ϥմɡʣǣãͥˡΣ	using electrostatic storage on a common layer, e.g. Forrester-Haeff tubes(<b>G11C11/22</b> takes precedence)	284
G11C  11/24		ѥѤΡʣǣãͥ表ȾƳ֤ȥѥȹ礻ѤΣǣã㡥ǣãˡΣ	using capacitors(<b>G11C11/22</b> takes precedence; using a combination of semiconductor devices and capacitors <b>G11C11/34</b>, e.g. <b>G11C11/40</b>)	1257
G11C  11/26		ŴɤѤΡΣ	using discharge tubes	47
G11C  11/28		ɤѤΡΣ	using gas-filled tubes	129
G11C  11/30		ɤѤΡʣǣãͥˡΣ	using vacuum tubes(<b>G11C11/23</b> takes precedence)	79
G11C  11/34		ȾƳ֤ѤΡΣ	using semiconductor devices	12557
G11C  11/35		ؤѤ줿Ų٤Ρ㡥Ųٷ֡Σ	with charge storage in a depletion layer, e.g. charge coupled devices	177
G11C  11/36		ɤѤΡ㡥ǻҤȤѤΡΣ	using diodes, e.g. as threshold elements	374
G11C  11/38		ȥͥɤѤΡΣ	using tunnel diodes	188
G11C  11/39		ꥹѤΡΣ	using thyristors	298
G11C  11/40		ȥ󥸥ѤΡΣ	using transistors	4316
G11C  11/401		եå󥰤ޤŲٺʤʥߥåΣ	forming cells needing refreshing or charge regeneration, i.e. dynamic cells	14107
G11C  11/402		ơΥꥻ˸̤ŲٺʤեåĤΡΣ	with charge regeneration individual to each memory cell, i.e. internal refresh	670
G11C  11/403		¿Υꥻ˶̤ŲٺʤեåĤΡΣ	with charge regeneration common to a multiplicity of memory cells, i.e. external refresh	1625
G11C  11/404		ĤΥꡤĤŲžȡ㡥ͣϣӥȥ󥸥ĤΡΣ	with one charge-transfer gate, e.g. MOS transistor, per cell	1502
G11C  11/405		ĤΥꡤĤŲžȡ㡥ͣϣӥȥ󥸥ĤΡΣ	with three charge-transfer gates, e.g. MOS transistors, per cell	1262
G11C  11/406		եå󥰤ޤŲٺδޤΣ	Management or control of the refreshing or charge-regeneration cycles	6768
G11C  11/4063		ղϩ㡥ɥ쥹ѡǥѡưѡѡѡޤϥߥѡΣ	Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing	1835
G11C  11/4067		Хݡ鷿ΥꡦѤμղϩΣ	for memory cells of the bipolar type	44
G11C  11/407		ų̷ΥꡦѤμղϩΣ	for memory cells of the field-effect type	10155
G11C  11/4072		ѥåפޤϥѥ󡤥ꥯꥢޤϥץꥻåѤβϩΣ	Circuits for initialization, powering up or down, clearing memory or presetting	625
G11C  11/4074		϶ϩޤŰȯϩ㡥ХŰȯŰȯХååŸŸϩΣ	Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits	3474
G11C  11/4076		ߥ󥰲ϩʺѣǣãˡΣ	Timing circuits(for regeneration management <b>G11C11/406</b>)	4035
G11C  11/4078		ޤݸϩ㡥դʡ뤤ɽФߤɤΤΡơ롨ƥȡʥåޤϥƥȤˤƤݸǣãˡΣ	Safety or protection circuits, e.g. for preventing inadvertent or unauthorised reading or writing; Status cells; Test cells(protection of memory contents during checking or testing <b>G11C29/52</b>)	464
G11C  11/408		ɥ쥹ϩΣ	Address circuits	5166
G11C  11/409		ɽФݽߡΣҡݣסϲϩΣ	Read-write [R-W] circuits	7054
G11C  11/4091		󥹤ޤϥ󥹡եåޤϥ󥹴Ϣϩ㡥ӥåФΥץ㡼饤ޤʬΥΣ	Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating	3311
G11C  11/4093		ϡΣɡϡϥǡ󥿡ե㡥ǡХåեΣ	Input/output [I/O] data interface arrangements, e.g. data buffers	2461
G11C  11/4094		ӥåޤϩΣ	Bit-line management or control circuits	2005
G11C  11/4096		ϡΣɡϡϥǡޤϩ㡥ɽФޤϽ߲ϩɡϥɥ饤СӥååΣ	Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches	3526
G11C  11/4097		ӥå㡥ӥå쥤ȡ֤ӥåΣ	Bit-line organisation, e.g. bit-line layout, folded bit lines	1417
G11C  11/4099		ߡեŰȯΣ	Dummy cell treatment; Reference voltage generators	490
G11C  11/41		Ԥˤ륻롤ʤեå󥰤ޤŲٺɬפȤʤΡ㡥аޥХ֥졼ޤϥߥåȥȥꥬΣ	forming cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger	7037
G11C  11/411		Хݡȥ󥸥ΤߤѤΡΣ	using bipolar transistors only	830
G11C  11/412		ų̥ȥ󥸥ΤߤѤΡΣ	using field-effect transistors only	3869
G11C  11/413		ղϩ㡥ɥ쥷󥰡沽ưߡΡƱϲѡΣ	Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction	8108
G11C  11/414		Хݡ鷿ΥꥻѡΣ	for memory cells of the bipolar type	707
G11C  11/415		ɥ쥹ϩΣ	Address circuits	221
G11C  11/416		ɽФݽ߲ϩΣҡݣסϡΣ	Read-write [R-W] circuits	731
G11C  11/417		ų̷ΥꥻѡΣ	for memory cells of the field-effect type	3367
G11C  11/418		ɥ쥹ϩΣ	Address circuits	1402
G11C  11/419		ɽФݽ߲ϩΣҡݣסϡΣ	Read-write [R-W] circuits	4531
G11C  11/4193		üȾƳε֤ͭμ֡㡥ɥ쥷󥰡ưСߥ󥰡϶롤ãΤΤΡʣǣãǣãͥˡΣ	Auxiliary circuits specific to particular types of semiconductor storage devices, e.g. for addressing, driving, sensing, timing, power supply, signal propagation(<b>G11C11/4063</b>, <b>G11C11/413</b> take precedence)	359
G11C  11/4195		ɥ쥹ϩΣ	Address circuits	15
G11C  11/4197		ɽФݽ߲ϩΣҡݣסϡΣ	Read-write [R-W] circuits	79
G11C  11/42		ץȡݥ쥯ȥ˥֡ʤŵŪޤϸŪ˷礵줿ͤӸŵ֤Ѥ	using opto-electronic devices, i.e. light-emitting and photoelectric devices electrically- or optically-coupled	951
G11C  11/44		ĶƳǻҡ㡥饤ȥ󡤤ѤΡΣ	using super-conductive elements, e.g. cryotron	1070
G11C  11/46		ǮǻҤѤ	using thermoplastic elements	35
G11C  11/48		ߤޤϼʥ󥹤ۤʤ֤δ֤Ѳ뤿ΰưǽʷǻҡ㡥Ѥ	using displaceable coupling elements, e.g. ferromagnetic cores, to produce change between different states of mutual or self-inductance	23
G11C  11/50		򵭲뤿ŵưΡΣ	using actuation of electric contacts to store the information	125
G11C  11/52		ż졼Ѥ	using electromagnetic relays	38
G11C  11/54		ʪ˦㡥˥塼󡤤򥷥ߥ졼󤷤ǻҤѤ	using elements simulating biological cells, e.g. neuron	1317
G11C  11/56		ƥåפˤäɽ蘆룲ĤޤϤʾοΰ֤ĵǻҤѤΡ㡥ŰˤΡήˤΡˤΡȿˤΡΣ	using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency	8366
G11C  13/00		ǣãǣãޤϣǣãޤʤǻҤλѤˤäħŤ줿ǥ뵭	Digital stores characterised by the use of storage elements not covered by groups <b>G11C11/00</b>, <b>G11C23/00</b>, or <b>G11C25/00</b>	9607
G11C  13/02		ѲˤäƺưǻҤѤΡΣ	using elements whose operation depends upon chemical change	1857
G11C  13/04		ŪǻҤѤ	using optical elements	3311
G11C  13/06		ݸǻҤѤΡΣ	using magneto-optical elements	728
G11C  14/00		Ÿǻ˥Хååפ뤿ΡȯꥻԴȯꥻ֤ˤäħŤ줿ǥ뵭֡Σ	Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down	2745
G11C  15/00		ĤޤϤʾħŪʬʤ󤬽񤭹ޤ졤ɽФϤΣĤޤϰʾħŪʬˤĤõ뤳ȤˤäƹԤʤǥ뵭֡ʤϢ۵ޤƥɥ쥹֡Σ	Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores	2393
G11C  15/02		ŪǻҤѤΡΣ	using magnetic elements	284
G11C  15/04		ȾƳǻҤѤΡΣ	using semiconductor elements	2638
G11C  15/06		饤˥åǻҤѤΡΣ	using cryogenic elements	96
G11C  16/00		õǽǥץǽʥ꡼ɥʣǣãͥˡΣ	Erasable programmable read-only memories(<b>G11C14/00</b> takes precedence)	2062
G11C  16/02		ŵŪ˥ץǽʤΡΣ	electrically programmable	13087
G11C  16/04		ͤѤʥȥ󥸥ѤΡ㡥ƣͣϣӡΣ	using variable threshold transistors, e.g. FAMOS	20009
G11C  16/06		ղϩ㡥ؤνѡΣ	Auxiliary circuits, e.g. for writing into memory	16710
G11C  16/08		ɥ쥹ϩǥϩΣ	Address circuits; Decoders; Word-line control circuits	6941
G11C  16/10		ץߥ󥰤ޤϥǡϲϩΣ	Programming or data input circuits	12072
G11C  16/12		ץߥŰå󥰲ϩΣ	Programming voltage switching circuits	2382
G11C  16/14		ŵŪ˾õ뤿βϩ㡥õŰå󥰲ϩΣ	Circuits for erasing electrically, e.g. erase voltage switching circuits	3755
G11C  16/16		֥åõѤΤΡ㡥쥤ʣɡ롼סΣ	for erasing blocks, e.g. arrays, words, groups	2767
G11C  16/18		Ū˾õ뤿βϩΣ	Circuits for erasing optically	205
G11C  16/20		ǡΥץꥻåȡåפμ̡Σ	Initialising; Data preset; Chip identification	743
G11C  16/22		ꡦؤʡޤθΥɤΰޤݸϩΣ	Safety or protection circuits preventing unauthorised or accidental access to memory cells	1367
G11C  16/24		ӥåϩΣ	Bit-line control circuits	3669
G11C  16/26		󥹲ϩޤɽФϩǡϲϩΣ	Sensing or reading circuits; Data output circuits	8870
G11C  16/28		ư󥷥󥰤ޤϥե󥹡ѤΡ㡥ߡΣ	using differential sensing or reference cells, e.g. dummy cells	1627
G11C  16/30		϶ϩΣ	Power supply circuits	5200
G11C  16/32		ߥ󥰲ϩΣ	Timing circuits	1669
G11C  16/34		ץߥ󥰾֤ηꡤ㡥ŰߤޤԽʬʽߡƥ󥷥Σ	Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention	10365
G11C  17/00		٤ץǽɽФѥꡨȾʵŪ֡㡥ưǺؤǽʾ󥫡ɡΣ	Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards	11787
G11C  17/02		ŪޤͶƳŪǻҤѤΡʣǣãͥˡΣ	using magnetic or inductive elements(<b>G11C17/14</b> takes precedence)	720
G11C  17/04		ŪǻҤѤΡʣǣãǣãͥˡΣ	using capacitive elements(<b>G11C17/06</b>, <b>G11C17/14</b> take precedence)	246
G11C  17/06		ǻҤѤΡʣǣãͥˡΣ	using diode elements(<b>G11C17/14</b> takes precedence)	820
G11C  17/08		ȾƳ֤ѤΡ㡥ХݡǻҤѤΡʣǣãǣãͥˡΣ	using semiconductor devices, e.g. bipolar elements(<b>G11C17/06</b>, <b>G11C17/14</b> take precedence)	827
G11C  17/10		εƤǻҤΤ餫줿֤ˤä¤˷Ρ㡥ޥץǽʣңϣ͡Σ	in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM	163
G11C  17/12		ų̷֤ѤΡΣ	using field-effect devices	1511
G11C  17/14		εƤǻҤξ֤ʵפѤ뤳ȤˤäϢ󥯤ŪꡤǤޤѹ뤳ȤˤΡ㡥Уңϣ͡Σ	in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM	1158
G11C  17/16		ŵŪǲǽʥ󥯤ѤΡΣ	using electrically-fusible links	2561
G11C  17/18		ղϩ㡥ؤνѡΣ	Auxiliary circuits, e.g. for writing into memory	3195
G11C  19/00		󤬥ƥå׷ǰưǥ뵭֡㡥եȡ쥸Σ	Digital stores in which the information is moved stepwise, e.g. shift registers	4819
G11C  19/02		ǻҤѤΡʣǣãͥˡΣ	using magnetic elements(<b>G11C19/14</b> takes precedence)	151
G11C  19/04		Ĥιޤϼ롼פͭ륳ѤΡΣ	using cores with one aperture or magnetic loop	495
G11C  19/06		¿ιޤϼ롼פͭ빽¤ѤΡ㡥ȥ󥹥ե饯Σ	using structures with a number of apertures or magnetic loops, e.g. transfluxors	168
G11C  19/08		ʿ칽¤ѤΡΣ	using thin films in plane structure	4373
G11C  19/10		åɾѤΡĥˤΡΣ	using thin films on rods; with twistors	86
G11C  19/12		ϩͶƳǻҤѤΡΣ	using non-linear reactive devices in resonant circuits	57
G11C  19/14		ǽưǻҡ㡥ŴɡȾƳǻҡȷ礷ǻҤѤΡʣǣãͥˡΣ	using magnetic elements in combination with active elements, e.g. discharge tubes, semiconductor elements(<b>G11C19/34</b> takes precedence)	48
G11C  19/18		ơμǻҤȤƥѥѤΡΣ	using capacitors as main elements of the stages	813
G11C  19/20		ŴɤѤΡʣǣãͥˡΣ	using discharge tubes(<b>G11C19/14</b> takes precedence)	88
G11C  19/28		ȾƳǻҤѤΡʣǣãǣãͥˡΣ	using semiconductor elements(<b>G11C19/14</b>, <b>G11C19/36</b> take precedence)	6692
G11C  19/30		ץȡ쥯ȥ˥֡ʤŵŪޤϸŪ˷礵줿ͤӸŵ֤ѤΡΣ	using opto-electronic devices, i.e. light-emitting and photoelectric devices electrically- or optically-coupled	125
G11C  19/32		ĶƳǻҤѤΡΣ	using super-conductive elements	98
G11C  19/34		ʾΰۤʤ֤ͭ뵭ǻҤѤΡ㡥ŰˤΡήˤΡˤΡȿˤΡΣ	using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency	38
G11C  19/36		ȾƳǻҤѤΡΣ	using semiconductor elements	136
G11C  19/38		󼡸Ρ㡥ʿȿľ˾󤬰ư륷եȥ쥸Σ	two-dimensional [2D], e.g. horizontal and vertical shift registers	118
G11C  21/00		󤬽۴ĤΥǥ뵭֡ʥƥå׷ΤΣǣã	Digital stores in which the information circulates(stepwise <b>G11C19/00</b>)	523
G11C  21/02		ŻҵŪٱ㡥䥿󥯡Ѥ	using electromechanical delay lines, e.g. using a mercury tank	128
G11C  23/00		ŪʬΰưˤäƵԤʤ碌뤳ȤħȤǥ뵭֡㡥ܡѤΡΤεǻҡΣ	Digital stores characterised by movement of mechanical parts to effect storage, e.g. using balls; Storage elements therefor	234
G11C  25/00		ήΤѤħȤǥ뵭֡Τεǻ	Digital stores characterised by the use of flowing media; Storage elements therefor	57
G11C  27/00		ŵŪʥ֡㡥ֻͤ򵭲뤿Τ	Electric analogue stores, e.g. for storing instantaneous values	2971
G11C  27/02		Сݻ֡ʣǣãͥˡΣ	Sample-and-hold arrangements(<b>G11C27/04</b> takes precedence)	3091
G11C  27/04		եȥ쥸Σ	Shift registers	1780
G11C  29/00		ΤưΤε֤ΥåХޤϥե饤ưε֤ΥƥȡΣ	Checking stores for correct operation; Testing stores during standby or offline operation	26450
G11C  29/02		ξ㤷ղϩθФޤϤΰ֤Σ	Detection or location of defective auxiliary circuits, e.g. defective refresh counters	4230
G11C  29/04		ξ㤷ǻҤθФޤϤΰ֤Σ	Detection or location of defective memory elements	7520
G11C  29/06		®Σ	Acceleration testing	873
G11C  29/08		ǽ㡥եåλѥ󡦥եƥȡΣУϣӣԡϡޤʬƥȡΣ	Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing	1918
G11C  29/10		ƥȥ르ꥺࡤ㡥ꥹΣͣӣϥ르ꥺࡨƥȥѥ㡥åܡɥѥΣ	Test algorithms, e.g. memory scan [MScan] algorithms; Test patterns, e.g. checkerboard patterns	1579
G11C  29/12		ΤȤ߹֡㡥Ȥ߹߼ʥƥȡΣ£ɣӣԡϡΣ	Built-in arrangements for testing, e.g. built-in self testing [BIST]	5561
G11C  29/14		ǡμ»ܡ㡥ƥȥ⡼ɤΥǥΣ	Implementation of control logic, e.g. test mode decoders	1303
G11C  29/16		ޥץΥ˥åȤѤΡ㡥ơȥޥΣ	using microprogrammed units, e.g. state machines	298
G11C  29/18		ɥ쥹֡˥뤿֡㡥ɥ쥹ϩκΣ	Address generation devices; Devices for accessing memories, e.g. details of addressing circuits	1086
G11C  29/20		󥿤ޤեɥХåեȥ쥸Σ̣ƣӣҡϤѤΡΣ	using counters or linear-feedback shift registers [LFSR]	379
G11C  29/22		ꥢإΡΣ	Accessing serial memories	83
G11C  29/24		ŪʥإΡ㡥ߡޤϾĹΣ	Accessing extra cells, e.g. dummy cells or redundant cells	900
G11C  29/26		ޥץ륢쥤إΡʣǣãͥˡΣ	Accessing multiple arrays(<b>G11C29/24</b> takes precedence)	428
G11C  29/28		¸طΤޥץ륢쥤㡥ޥӥåȤĥ쥤Σ	Dependent multiple arrays, e.g. multi-bit arrays	126
G11C  29/30		󥰥륢쥤إΡΣ	Accessing single arrays	81
G11C  29/32		ꥢ륢ƥȡΣ	Serial access; Scan testing	396
G11C  29/34		ޥӥåȤƱ˥ΡΣ	Accessing multiple bits simultaneously	1114
G11C  29/36		ǡ֡㡥ǡѴΣ	Data generation devices, e.g. data inverters	707
G11C  29/38		֡Σ	Response verification devices	1006
G11C  29/40		̵ѤѤΡΣ	using compression techniques	499
G11C  29/42		ΣţãáϤޤϥѥƥåѤΡΣ	using error correcting codes [ECC] or parity check	5566
G11C  29/44		ɽޤϼ̡㡥ΤΤΡΣ	Indication or identification of errors, e.g. for repair	4364
G11C  29/46		ƥȥȥꥬåΣ	Test trigger logic	555
G11C  29/48		֤γμʤˤäŬŪ֡㡥쥯ȥꥢΣģͣϤѤΡޤϼեϩѤΡΣ	Arrangements in static stores specially adapted for testing by means external to the store, e.g. using direct memory access [DMA] or using auxiliary access paths	811
G11C  29/50		ޡ㡥ߥ󥰡ŰޤήΣ	Marginal testing, e.g. race, voltage or current testing	3707
G11C  29/52		ƤݸƤθθСΣ	Protection of memory contents; Detection of errors in memory contents	3606
G11C  29/54		ϩ߷פ뤿֡㡥ƥưײ߷סΣģƣԡϥġΣ	Arrangements for designing test circuits, e.g. design for test [DFT] tools	378
G11C  29/56		ŪΤγ֡㡥ư֡ΣԣšϡΥ󥿡եΣ	External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor	7323
G11C  99/00		Υ֥饹¾Υ롼פʬवʤΣ	Subject matter not provided for in other groups of this subclass	42
